Direct conversion transceiver architectures are a popular choice for RF integrated circuit (IC) implementation in modern wireless communication applications due to their compact size and low power consumption as compared to a traditional heterodyne transceiver. The main drawbacks of a direct conversion transceiver are impairments such as DC offsets and IQ mismatch. Modern wireless communication protocols including wireless LAN (e.g., IEEE 802.11 a/g/n) utilize orthogonal frequency division multiplexing (OFDM) with high-order (e.g., 64-QAM) constellation sizes to exchange high data-rate information over time dispersive wireless channels. The IQ mismatch (insufficient image rejection) and carrier leakage (or DC offset) at the transmitter side should be well-controlled so that the transmitted signal can be demodulated at the receiver with as little distortion as possible.
Continuing advancement in wireless communication technologies and applications drive an effort to miniaturize the IC size. For example, the multiple-input multiple-output (MIMO) communication protocol, which requires a large number of duplicate RF and analog circuits as well as complex baseband digital system in a system-on-chip (SoC) implementation, complicates the issues of miniaturization, mismatches, and carrier leakages.